NXP Semiconductors /LPC15xx /ADC0 /THR0_HIGH

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Interpret as THR0_HIGH

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED 0THRHIGH0RESERVED

Description

A/D High Compare Threshold Register 0: Contains the upper threshold level for automatic threshold comparison for any channels linked to threshold pair 0.

Fields

RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

THRHIGH

High threshold value against which A/D results will be compared

RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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